Publications
Journal & Conference papers
2026
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An error-aware design methodology for hardware-efficient approximate square root circuits
Integration, the VLSI Journal, Elsevier, art. 102865, 2026
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EEGPARnet: time-frequency attention transformer encoder and GRU decoder for removal of ocular and muscular artifacts from EEG signals
Medical & Biological Engineering & Computing, Springer, vol. 64, no. 3, pp. 975–999, 2026
2025
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Calculation and analysis of importance of spectral edge frequency and spectral energies in estimation of depth of anesthesia using machine learning and statistical method
2025 International Conference on Next Generation Computing Systems (ICNGCS), IEEE, pp. 1–7, 2025
2023
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Machine learning based depth of anaesthesia estimation using spectral and statistical features of EEG
International Conference on Communication, Electronics and Digital Technology (ICCEDT), Springer Nature Singapore, pp. 151–162, 2023
2021
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Triple linear congruential generator-based hardware-efficient pseudorandom bit generation
In Micro and Nanoelectronics Devices, Circuits and Systems: Select Proceedings of MNDCS 2021, Springer Singapore, pp. 237–245, 2021
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Energy-efficient hardware implementation of K-means clustering algorithm
In Micro and Nanoelectronics Devices, Circuits and Systems: Select Proceedings of MNDCS 2021, Springer Singapore, pp. 213–225, 2021
2020
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Hardware-efficient VLSI design for cascade support vector machine with on-chip training and classification capability
Circuits, Systems, and Signal Processing, Springer, vol. 39, no. 10, pp. 5272–5297, 2020
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Error-aware design procedure to implement energy-efficient approximate squaring hardware
Nanoscience & Nanotechnology-Asia, Bentham Science, vol. 10, no. 4, pp. 471–477, 2020
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Error-aware design procedure to implement hardware-efficient logarithmic circuits
IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 5, pp. 851–855, 2020
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An energy efficient 32-bit approximate Dadda multiplier
2020 IEEE Calcutta Conference (CALCON), pp. 162–165, 2020
2019
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Error-aware design procedure to implement hardware-efficient antilogarithmic converters
Circuits, Systems, and Signal Processing, Springer, vol. 38, no. 9, pp. 4266–4279, 2019
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Implementation of energy-efficient approximate multiplier with guaranteed worst case relative error
Microelectronics Journal, Elsevier, vol. 88, pp. 1–8, 2019
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Analysis and circuit sizing performance of a differential amplifier using HPSO algorithm
International Journal of Nanoparticles, Inderscience, vol. 11, no. 2, pp. 167–180, 2019
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A 32-bit energy efficient exact Dadda multiplier
2019 IEEE 5th International Conference for Convergence in Technology (I2CT), pp. 1–4, 2019
2018
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Energy-efficient approximate squaring hardware for error-resilient digital systems
2018 IEEE Electron Devices Kolkata Conference (EDKCON), pp. 202–206, 2018