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Papers, projects, talks and milestones, newest first.
2026
NewPaper “An error-aware design methodology for hardware-efficient approximate square root circuits” is published in Integration, the VLSI Journal (Elsevier). Details
Paper “EEGPARnet: time-frequency attention transformer encoder and GRU decoder for removal of ocular and muscular artifacts from EEG signals” appears in Medical & Biological Engineering & Computing (Springer). Details
2025
Paper Paper on spectral-edge frequency and spectral energies for depth-of-anaesthesia estimation presented at the IEEE International Conference on Next Generation Computing Systems (ICNGCS 2025).
2023
Paper “Machine learning based depth of anaesthesia estimation using spectral and statistical features of EEG” presented at ICCEDT 2023 (Springer).
2021
Paper Two papers, on pseudorandom bit generation and on k-means clustering hardware, published in the proceedings of MNDCS 2021 (Springer).
2020
Paper Hardware-efficient cascade SVM with on-chip training published in Circuits, Systems, and Signal Processing.
Paper “Error-aware design procedure to implement hardware-efficient logarithmic circuits” published in IEEE Transactions on Circuits and Systems II.
Ph.D. Awarded the Ph.D. in VLSI Design by NIT Silchar for the thesis “Approximate Computing Based VLSI Design for Energy-Efficient Cascade Support Vector Machine”.
2018
Career Joined the Department of Electronics and Communication Engineering, Manipur Technical University, as Assistant Professor.